COA Lecture Notes by Jayesh Umre

S.No Unit Topic to Cover Link
01 U1 Von Newman model Download
02 U1 Various subsystems, CPU Download
03 U1 I/O, System Bus Download
04 U1 CPU and Memory registers  Program Counter, Accumulator, Instruction register Download
05 U1 Micro-operations, Register Transfer Language, Download
06 U1    Instruction Fetch, decode and execution Download
07 U1  Data movement, Manipulation, Instruction formats Download
08 U1  Addressing modes of basic computer Download
09 U1 8085 microprocessor organization Download
10 U1 Revision Download
11 U2 Control Unit Organization: Hardwired control unit Download
12 U2  Micro and nano programmed control unit, Download
13 U2 Control Memory, Address Sequencing Download
14 U2 Micro Instruction formats Download
15 U2 Micro program sequencer, Microprogramming, Download
16 U2 Arithmetic and Logic Unit: Arithmetic Processor, Addition, subtraction, Download
17 U2 Multiplication and division Download
18 U2 Floating point and decimal arithmetic Download
19 U2  Arithmetic units Download
20 U2 Design of arithmetic unit. Download
21 U2 Numerical Download
22 U2 Revision Download
23 U3  Modes of data transfer – program controlled Interrupt driven direct memory access, Download
24 U3 Direct memory access, Download
25 U3 Interrupt structures, I/O Interface Download
26 U3  Asynchronous data transfer Download
27 U3  I/O processor,8085 I/O structure, Download
28 U3 8085 instruction set and basic programming. Download
29 U3  Data transfer – Serial / parallel, synchronous/asynchronous, Simplex/half duplex and full duplex. Download
30 U3 Revision Download
31 U4 Memory organization: Memory Maps, Memory Hierarchy Download
32 U4  Cache Memory – Organization and mappings. Download
33 U4 Cache Memory – Organization and mappings. Download
34 U4  Associative memory Download
35 U4 Virtual memory Download
36 U4 Page Fault, Demand Paging, Swapping Download
37 U4 Memory Management Hardware. Download
38 U4  Memory Management Hardware. Download
39     U5 Multiprocessors: Pipeline and Vector processing, Download
40 U5  Instruction and arithmetic pipelines, Download
41 U5  Vector and array processors, Interconnection structure, Interprocess Communication Download